Technical Program
Thursday, June 03, 2010
Session 20: Interconnection and Bonding for 3D/TSV
8:00 a.m. - 11:40 a.m.
Committee: Interconnections
Versailles 1 & 2
Session Co-Chairs:
|
James Lu Rensselaer Polytechnic Institute T +1-518-276-2909 F +1-518- 276-8761 luj@rpi.edu |
Voya Markovich Endicott Interconnect Technologies, Inc. T +1-607-755-1978 F +1-607-755-6151 voya.markovich@eitny.com |
Papers:
1. 1:30 PM - High Density Interconnect at 10µm Pitch with Mechanically Keyed Cu/Sn-Cu and Cu-Cu Bonding for 3-D Integration
Jason D. Reed- RTI International
Matthew Lueck- RTI International
Chris Gregory- RTI International
Alan Huffman- RTI International
John M. Lannon, Jr.- RTI International
Dorota Temple- RTI International
2. 1:55 PM - Intermetallic Cu3Sn as Oxidation Barrier for Fluxless Cu-Sn Bonding
H. Liu- Vestfold University College
K. Wang- Vestfold University College
K. Aasmundtveit- Vestfold University College
N. Hoivik- Vestfold University College
3. 2:20 PM - Cu/Sn Microbumps Interconnect for 3D TSV Chip Stacking
Rahul Agarwal- IMEC
Wenqi Zhang- IMEC
Paresh Limaye- IMEC
Riet Labie- IMEC
Biljana Dimcic- IMEC
Alain Phommahaxay- IMEC
Philippe Soussan- IMEC
4. 3:30 PM - IMC Bonding for 3-D Interconnection
K. Sakuma- IBM Corporation
K. Sueoka- IBM Corporation
S. Kohara- IBM Corporation
K. Matsumoto- IBM Corporation
H. Noma- IBM Corporation
T. Aoki- IBM Corporation
Y. Oyama- IBM Corporation
H. Nishiwaki- IBM Corporation
P.S. Andry- IBM Corporation
C.K. Tsang- IBM Corporation
J.U. Knickerbocker- IBM Corporation
Y. Orii- IBM Corporation
5. 3:55 PM - Modified Diffusion Bonding for Both Cu and SiO2 at 150°C in Ambient Air
Akitsu Shigetou- National Institute for Materials Science (NIMS)
Tadatomo Suga- University of Tokyo
6. 4:20 PM - Copper Direct Bonding: An Innovative 3D Interconnect
Pierric Gueguen- CEA LETI-Minatec
Léa Di Cioccio- CEA LETI-Minatec
Panagiota Morfouli- IMEP-LAHC
Marc Zussy- CEA LETI-Minatec
Jérome Dechamp- CEA LETI-Minatec
Laurent Bally- CEA LETI-Minatec
Laurent Clavelier- CEA LETI-Minatec
7. 4:45 PM - Three Chips Stacking with Low Volume Solder Using Single Re-Flow Process
Navas Khan- Institute of Microelectronics, A*STAR
David Ho Soon Wee- Institute of Microelectronics, A*STAR
Ong Siong Chiew- Institute of Microelectronics, A*STAR
Cheryl Sharmani- Institute of Microelectronics, A*STAR
Li Shiah Lim- Institute of Microelectronics, A*STAR
Hong Yu Li - Institute of Microelectronics, A*STAR
Shekar Vasarala- Institute of Microelectronics, A*STAR