Technical Program
Wednesday, June 02, 2010
Session 7: Wafer Level Packaging and Processing
1:30 PM - 5:10 PM
Committee: Advanced Packaging
Concorde A
Session Co-Chairs:
|
Young-Gon Kim Intersil T +1-408-546-3371 F +1-408-434-5363 ykim@intersil.com |
John H. Lau ITRI T +886-3591-3390 F johnlau@itri.org.tw |
Papers:
1. 1:30 PM - Fine Pitch Connection and Thermal Stress Analysis of a Novel Wafer Level Packaging Technology Using Laminating Process
Yoshio Okayama- Sanyo Electric Co., Ltd.
Mayumi Nakasato- Sanyo Electric Co., Ltd.
Kouichi Saitou- Sanyo Electric Co., Ltd.
Yasuyuki Yanase- Sanyo Electric Co., Ltd.
Hajime Kobayashi- Sanyo Electric Co., Ltd.
Tetsuya Yamamoto- Sanyo Electric Co., Ltd.
Ryosuke Usui- Sanyo Electric Co., Ltd.
Yasunori Inoue- Sanyo Electric Co., Ltd.
2. 1:55 PM - High-Sensitivity Electromigration Testing of Lead-Free WLCSP Solder Bumps
James Walls- Freescale Semiconductor
Shun-Meen Kuo- Freescale Semiconductor
Eric Gelvin- Freescale Semiconductor
Albert Rogers- Freescale Semiconductor
3. 2:20 PM - The Advanced Pattern Designs with Electrical Test Methodologies on Through Silicon Via for CMOS Image Sensor
Hsien Chung- Chung-Cheng Institute of Technology
Ching-Yu Ni- Xintec, Inc.
Che-Min Tu- Chung-Cheng Institute of Technology
Yu-Yao Chang- Chung-Cheng Institute of Technology
Yao-Te Haung- Xintec, Inc.
Wei-Ming Chen- Xintec, Inc.
Bai-Yao Lou- Xintec, Inc.
Kun-Fu Tseng- Chin-Min Institute of Technology
Chih-Yuan Lee- Chung-Cheng Institute of Technology
Ben-Je Lwo- Chung-Cheng Institute of Technology
4. 3:30 PM - A Novel Room-Temperature Wafer Direct Bonding Method by Fluorine Containing Plasma Activation
Chenxi Wang- University of Tokyo
Tadatomo Suga- University of Tokyo
5. 3:55 PM - Wafer Level Embedded System in Package (WL-eSiP) for Mobile Applications
In-Soo Kang- NEPES Corporation
Gi-Jo Jung- NEPES Corporation
Byoung-Yool Jeon- NEPES Corporation
Jae-Hyouk Yoo- NEPES Corporation
Seong-Hun Jeong- NEPES Corporation
6. 4:20 PM - Carrierless Design for Handling and Processing of Ultrathin Wafers
Florian Bieck- Doublecheck Semiconductors Pte., Ltd.
Sven Spiller- Doublecheck Semiconductors Pte., Ltd.
Froilan Molina- Doublecheck Semiconductors Pte., Ltd.
Michael Töpper- Fraunhofer IZM
Christina Lopper- Fraunhofer IZM
Ingrid Kuna- Fraunhofer IZM
Tan Chuan Seng- Nanyang Technological University
Tomotaka Tabuchi- Disco HiTech Europe GmbH
7. 4:45 PM - A Novel Wafer Level Bonding/Debonding Technique Using an Anti-Adhesion Layer for Polymer-Based 0-Level Packaging of RF Device
J.G. Kim- IEMN
S. Seok- IEMN
N. Rolland- IEMN
P.A. Rolland- IEMN