Technical Program

Wednesday, May 30, 2018

Session 1: Wafer-Level Fan-Out Process Integration
8:00 AM - 11:40 AM
Committee: Packaging Technologies

Session Co-Chairs:

Bora Baloglu
Amkor Technology
T +1-480 786 7307
bora.baloglu@amkor.com
Beth Keser
Intel Corporation
T +49 (89) 9988532 0713
beth.keser@intel.com

Papers:

1. 8:00 AM - 3D-MiM Fan-out for Advanced System Integration Technology
An-Jhih Su - Taiwan Semiconductor Manufacturing Company
Terry Ku Kuo-Chung Yee Douglas Yu

2. 8:25 AM - Construction on FO-MCM with C4 bumps built first based on Chip last assembly technology
Chih-Hsun Hsu - Siliconware Precision Industries Co., Ltd.
C. Key Chung - Siliconware Precision Industries Co., Ltd.
C.F. Lin - Siliconware Precision Industries Co., Ltd.
Yih Jenn Jiang - Siliconware Precision Industries Co., Ltd
Trista Xie - Siliconware Precision Industries Co., Ltd

3. 8:50 AM - Feasibility Study of Fan-Out Panel-Level Packaging for Heterogeneous Integration
Cheng-Ta Ko - Unimicron
Henry Yang - Unimicron
John Lau - ASM
Ming Li - ASM

4. 10:00 AM - Integrating HBM2 with HDFO Technology for a Lower Cost, Higher Performance TSV-less 2.5D Package
George Scott - Amkor Technology, Inc.
JaeHun Bae - Amkor Technology Korea, Inc.
MinJae Yi - Amkor Technology Korea, Inc.
Nathan Whitchurch - Amkor Technology, Inc.
Moh Kolbehdari - Amkor Technology, Inc.
SangHyoun Lee - Amkor Technology Korea, Inc.
JongHyun Jeon - Amkor Technology Korea, Inc.
Curtis Zwenger - Amkor Technology, Inc.

5. 10:25 AM - Development of Wafer Level Process for the Fabrication of Advanced Capacitive Fingerprint Sensor Using Embedded Silicon Fan-Out (eSiFO®) Technology
shuying ma - Huantian Technology (Kunshan) Electronics Co., Ltd
fengxia zheng - Huantian Technology (Kunshan) Electronics Co., Ltd
daquan yu - Huantian Technology (Kunshan) Electronics Co., Ltd
peng li - Huantian Technology (Xi'AN) Electronics Co., Ltd
weidong liu - Huantian Technology (Xi'AN) Electronics Co., Ltd
Jambo Yu - Synaptic
jason Goodelle - Synaptic

6. 10:50 AM - Three-Dimensional Integrated Circuit (3D-IC) Package Using Fan-out Technology
Jun Kyu Lee - NEPES Corporation
Sang Yong Park - NEPES Corporation
Young Ho Kim - NEPES Corporation
Jae Cheon Lee - NEPES Corporation
Yong Tae Kwon - NEPES Corporation
Jong Heon Kim - NEPES Corporation
Nam Chul Kim - NEPES Corporation
Chang Woo - NEPES Corporation

7. 11:15 AM - Ultra High Density I/O Fan-out Design Optimization with Signal and Power Integrity
Chih-Yi Huang - Advanced Semiconductor Engineering, Inc
Chen-Chao Wang - Advanced Semiconductor Engineering, Inc
Hung-Chun Kuo - Advanced Semiconductor Engineering, Inc
Ming-Fong Jhong - Advanced Semiconductor Engineering, Inc
Tsun-Lung Hsieh - Advanced Semiconductor Engineering, Inc
Mi-Chun Hung - Advanced Semiconductor Engineering, Inc
Keng Tuan Chang - Advanced Semiconductor Engineering, Inc