Technical Program

Thursday, May 31, 2018

Session 13: Fan-Out and Interposer Interconnections
8:00 AM - 11:40 AM
Committee: Interconnections
Room: Harbor Island 1

Session Co-Chairs:

Katsuyuki Sakuma
IBM Corporation
T +1-914-945-2080
Jean-Charles Souriau
CEA Leti
T +33 4 38 78 98 13


1. 8:00 AM - Chip Stackable, Ultra-Thin, High-Flexibility 3D FOWLP (3D SWIFT(R) Technology) for Hetero-integrated Advanced 3D WL-SiP
WonMyoung Ki - Amkor Technology, Inc.
WonGeol Lee - Amkor Technology, Inc.
IlBok Lee - Amkor Technology, Inc.
InSu Mok - Amkor Technology, Inc.
WonChul Do - Amkor Technology, Inc.
Moh Kolbehdari - Amkor Technology, Inc.
Alex Copia - Amkor Technology, Inc.
Suresh Jayaraman - Amkor Technology, Inc.
Curtis Zwenger - Amkor Technology, Inc.
KangWook Lee - Amkor Technology, Inc.

2. 8:25 AM - High Performance, High Density RDL for Advanced Packaging
Chun Hui Yu - Taiwan Semiconductor Manufacturing Company
L. J. Yen - Taiwan Semiconductor Manufacturing Company
C. Y. Hsieh - Taiwan Semiconductor Manufacturing Company
J. S. Hsieh - Taiwan Semiconductor Manufacturing Company
Victor C. Y. Chang - Taiwan Semiconductor Manufacturing Company
C. H. Hsieh - Taiwan Semiconductor Manufacturing Company
C. S. Liu - Taiwan Semiconductor Manufacturing Company
C. T. Wang - Taiwan Semiconductor Manufacturing Company
KC Yee - Taiwan Semiconductor Manufacturing Company
Doug C. H. Yu - Taiwan Semiconductor Manufacturing Company

3. 8:50 AM - Warpage Measurements and Characterizations of Fan-Out Wafer-Level Packaging (FOWLP) with Large Chips and Multiple Re-Distributed Layers (RDLs)
John Lau - ASM Pacific Technology
Ming Li - ASM Pacific Technology
Margie Li - ASM Pacific Technology
Iris Xu - JCAP
Tony Chen - JCAP
Zhang Li - JCAP
Kim Hwee Tan - JCAP
Rozalia Beica - The DOW Chemical Company
Nelson Fan - ASM Pacific Technology
Eric Kuah - ASM Pacific Technology

4. 10:00 AM - Development of Novel Fine Line 2.1 D Package with Organic Interposer Using Advanced Substrate-based Process
Weii-Chung Chen - Advanced Semiconductor Engineering, Inc
Chiu-Wen Lee - Advanced Semiconductor Engineering, Inc
Min-Hua Chung - Advanced Semiconductor Engineering, Inc
Chaung-Chi Wang - Advanced Semiconductor Engineering, Inc
Shang-Kun Huang - Advanced Semiconductor Engineering, Inc
Yen-Sen Liao - Advanced Semiconductor Engineering, Inc
Hung-Chun Kuo - Advanced Semiconductor Engineering, Inc
Chen-Chao Wang - Advanced Semiconductor Engineering, Inc
David Tarng - Advanced Semiconductor Engineering, Inc

5. 10:25 AM - Micro Bump System for 2nd Generation Silicon Interposer with GPU and High Bandwidth Memory (HBM) Concurrent Integration
Jaesik Lee - Nvidia Corporation
Chun Yang Lee - Nvidia Corporation
Chongho Kim - Nvidia Corporation
Shantanu Kalchuri - Nvidia Corporation

6. 10:50 AM - Low Cost Panel-Based 1-2 Micron RDL Technology with Lower Resistance than Si BEOL for Large Packages
Fuhan Liu - Georgia Institute of Technology
Hirokaza Ito - JSR Corporation
Rui Zhang - Georgia Institute of Technology
Bartlet DeProspo - Georgia Institute of Technology
Fabian Benthaus - Georgia Institute of Technology
Hisanori Akimaru - JSR Corporation
Kouichi Hasegawa - JSR Corporation
Venky Sundaram - Georgia Institute of Technology
Rao Tummala - Georgia Institute of Technology

7. 11:15 AM - Advanced Anodic Aluminum Oxide Interposer Fabrication and 3D Embedded Inductors
Hsiang Yu Chan - University of California, Irvine
Mark Bachman - University of California, Irvine
Guann Pyng Li - University of California, Irvine