Technical Program

Friday, June 01, 2018

Session 34: Fan-Out Wafer Level Package Reliability
1:30 PM - 5:10 PM
Committee: Applied Reliability
Room: Nautilus 1 & 2

Session Co-Chairs:

Darvin R. Edwards
Edwards Enterprise Consulting, LLC
T +1-972-571-7638
darvin.edwards1@gmail.com
Pilin Liu
Intel Corporation
T +1-480-552-3020
pilin.liu@intel.com

Papers:

1. 1:30 PM - Reliability of Fan-Out Wafer-Level Packaging (FOWLP) with Large Chips and Multiple Re-Distributed Layers (RDLs)
John Lau - ASM
Ming Li - ASM
Xiangyong Qing - Huawei
Koh Sau Wee - Huawei
Xi Cao - Huawei
Mian Tao - HKUST
Jeffery Lo - HKUST
Margie Li - ASM
Rozalia Beica - DOW
Nelson Fan - ASM

2. 1:55 PM - Passivation materials for a reliable fine pitch RDL
Stéphane Moreau - CEA, LETI
Nacima Allouti - CEA, LETI
Romaric Dechanoz - CEA, LETI
Céline Ribière - CEA, LETI
David Bouchu - CEA, LETI
Anaïs D'Affroux - CEA, LETI
Jean Charbonnier - CEA, LETI
Jean-Philippe Michel - CEA, LETI
Nicolas Buffet - CEA, LETI
Pascal Chausse - CEA, LETI

3. 2:20 PM - Bias-HAST Evaluation of Cu Dendrites Growth between Fine Pitch RDL with Low Temperature Curable Polyimide Layer
Yu Chuan Chen - Siliconware Precision Industries Co., Ltd.
Katch Wan - Siliconware Precision Industries Co., Ltd
Chen An Chang - Siliconware Precision Industries Co., Ltd
Rick Lee - Siliconware Precision Industries Co., Ltd

4. 3:30 PM - Reliability of Ultra-thin Embedded Silicon Fan-out (eSiFO) Package Directly Assembled on PCB for Mobile Applications
Cheng Chen - Institute of Microelectronics of Chinese Academy of Sciences
Teng Wang - Huatian Technology (Kunshan) Electronics Co., Ltd.
Daquan Yu - Huatian Technology (Kunshan) Electronics Co., Ltd.
Shuying Ma - Huatian Technology (Kunshan) Electronics Co., Ltd.
Kai Zhu - Huatian Technology (Xi'an) Electronics Co., Ltd.
Zhiyi Xiao - Huatian Technology (Kunshan) Electronics Co., Ltd.
Lixi Wan - Institute of Microelectronics of Chinese Academy of Sciences

5. 3:55 PM - Interfacial Strength Characterization and Simulation on Stacked Copper-Polymer Structures of Fan-out Packages
Chia-Kuei Hsu - Taiwan Semiconductor Manufacturing Company
Po-Yao Lin - Taiwan Semiconductor Manufacturing Company
Wen-Yi Lin - Taiwan Semiconductor Manufacturing Company
Ming-Chih Yew - Taiwan Semiconductor Manufacturing Company
Shu-Shen Yeh - Taiwan Semiconductor Manufacturing Company
Kuang-Chun Lee - Taiwan Semiconductor Manufacturing Company
Jin-Hua Wang - Taiwan Semiconductor Manufacturing Company
Po-Chen Lai - Taiwan Semiconductor Manufacturing Company
Che-Chia Yang - Taiwan Semiconductor Manufacturing Company
Shin-Puu Jeng - Taiwan Semiconductor Manufacturing Company

6. 4:20 PM - Effect of Underfill on Thermal Stresses of Fan-out Wafer Level Package Used in PoP: An Experimental Study by Advancements of Real-time Moiré Interferometry
Bulong Wu - University of Maryland College Park
Bongtae Han - University of Maryland College Park

7. 4:45 PM - Reliability Study of Large Fan-Out BGA Solution on FinFET Process
C.K. Yu - MEDIATEK INC.
W.S. Chiang - MEDIATEK INC.
Cooper Peng - MEDIATEK INC.
M.Z. Lin - MEDIATEK INC.
Y.H. Fang - MEDIATEK INC.
M.J. Lin - MEDIATEK INC.
Benson Lin - MEDIATEK INC.
Michael Huang - MEDIATEK INC.