Technical
Program
Thursday, June 03, 2010
Session 15: High-Speed, Circuit, and 3D Simulation
8:00 a.m. - 11:40 a.m.
Committee: Modeling & Simulation
Versailles 1 & 2
Session Co-Chairs:
Henning Braunisch
Intel Corporation
T +1-480-552-0844
F +1-480-552-1295
henning.braunisch@intel.com
|
Michael Lamson
Consultant
T +1231-544-8093
F
m-lamson@ieee.org
|
Papers:
1. 8:00 AM - EMI Sources from Mode Conversion in a Telco System High-Speed SERDES
Greg Pitner- Ansys Inc.
Daniel N. de Araujo- Ansys Inc.
Isaac Waldron- Ansys, Inc.
Minhong Mi- Ansys, Inc.
Bhyrav Mutnury- IBM Corporation
Nam Pham- IBM Corporation
2. 8:25 AM - A Broadband SSO Modeling for a Weak Signal Return-Path System Based on the Large-Scale Signal-Power Combined Three-Dimensional Full-Wave BEM Solver Model
Ryuichi Oikawa- NEC Electronics Corporation
Dipanjan Gope- Physware, Inc.
Vikram Jandhyala- Physware, Inc.
3. 8:50 AM - Time-Domain Simulation of System Interconnect Using Convolution and Newton-Raphson Iteration Methods
Matteo Cocchini- IBM Corporation
Wiren Dale Becker- IBM Corporation
George Katopis- IBM Corporation
Steven Gary Pytel, Jr.- Ansoft Corporation
4. 10:00 AM - Application of the Latency Insertion Method (LIM) to the Modeling of CDM ESD Event
Dmitri Klokotov- University of Illinois, Urbana-Champaign
Vrashank Shukla- University of Illinois, Urbana-Champaign
Jose Schutt-Ainé- University of Illinois, Urbana-Champaign
Elyse Rosenbaum- University of Illinois, Urbana-Champaign
5. 10:25 AM - Parallel-Distributed Block-LIM-Based Fast Transient Simulation of Tightly Coupled Transmission Lines
Yuta Inoue- Shizuoka University
Tadatoshi Sekine- Shizuoka University
Hideki Asai- Shizuoka University
6. 10:50 AM - Efficient Full-Wave Modeling of High Density TSVs for 3D Integration
Xiaoxiong Gu- IBM Corporation
Boping Wu- University of Washington
Mark Ritter- IBM Corporation
Leung Tsang- University of Washington
7. 11:15 AM - Slow Wave and Dielectric Quasi-TEM Modes of Metal-Insulator-Semiconductor (MIS) Structure Through Silicon Via (TSV) in Signal Propagation and Power Delivery in 3D Chip Package
Jun So Pak- KAIST
Jonghyun Cho- KAIST
Joohee Kim- KAIST
Junho Lee- Hynix Semiconductor, Inc.
Hyungdong Lee- Hynix Semiconductor, Inc.
Kunwoo Park- Hynix Semiconductor, Inc.
Joungho Kim- KAIST
