Session 7 – ECTC

Technical Program

Program Sessions: Wednesday May 29th 2:00 PM – 5:05 PM

Session 7: Heterogeneous Integration: Systems Design, Signal & Power Delivery, and Process Optimization
Committee: Packaging Technologies
Room:

Session Co-Chairs:

Lihong Cao
ASE
Email: [email protected]

Subhash L. Shinde
Notre Dame University
Email: [email protected]

Papers:

1. Next Generation Large Size High Interconnect Density CoWoS-R Package
Chien-Hsun Lee — Taiwan Semiconductor Manufacturing Company, Ltd.
C.L. Lai — Taiwan Semiconductor Manufacturing Company, Ltd.
M. Liu — Taiwan Semiconductor Manufacturing Company, Ltd.
J. Hu — Taiwan Semiconductor Manufacturing Company, Ltd.
S.L. Tsai — Taiwan Semiconductor Manufacturing Company, Ltd.
H.Y. Chen — Taiwan Semiconductor Manufacturing Company, Ltd.
J. Lin — Taiwan Semiconductor Manufacturing Company, Ltd.
C.C. Hsieh — Taiwan Semiconductor Manufacturing Company, Ltd.
C.K. Hsu — Taiwan Semiconductor Manufacturing Company, Ltd.
Kathy Yan — Taiwan Semiconductor Manufacturing Company, Ltd.
Shin-Puu Jeng — Taiwan Semiconductor Manufacturing Company, Ltd.
Jun He — Taiwan Semiconductor Manufacturing Company, Ltd.

2. World’s First UCIe Interoperability Silicon Enabling Open Standards Heterogeneous Integration
Xavier Brun — Intel Corporation
Stephen Wong — Intel Corporation
Manuel Mota — Synopsys, Inc.

3. Scalable Advanced DBHi Chiplet Package Using Silicon Bridge With 30 µm-pitch Solder Joints
Akihiro Horibe — IBM Research, Tokyo
Takahito Watanabe — IBM Research, Tokyo
Chinami Marushima — IBM Research, Tokyo
Divya Taneja — IBM Infrastructure
Sayuri Kohara — IBM Research, Tokyo
Hiroyuki Mori — IBM Research, Tokyo
Qianwen Chen — IBM Research
Eric Perfecto — IBM Research
Aakrati Jain — IBM Research
Joseph Ross — IBM Research
Thomas Wassick — IBM Infrastructure
Isabel de Sousa — IBM Infrastructure

4. Performance Evaluation of UCIe-based Die-to-Die Interface on Low-Cost 2D Packaging Technology
Srujan Penta — Marvell Technology, Inc.
Ting Zheng — Marvell Technology, Inc.
Aatreya Chakravarti — Marvell Technology, Inc.
Wolfgang Sauter — Marvell Technology, Inc.
Eric Tremble — Marvell Technology, Inc.
Anthony Sigler — Marvell Technology, Inc.
Carl Benes — Marvell Technology, Inc.
Muhannad Bakir — Georgia Institute of Technology

5. Signal & Power Integrity Optimization Utilizing Silicon Core Substrate (SCS)
Seann Ayers — Applied Materials, Inc.
Steven Verhaverbeke — Applied Materials, Inc.
Han-Wen Chen — Applied Materials, Inc.
Liu Jiang — Applied Materials, Inc.
El Mehdi Bazizi — Applied Materials, Inc.

6. Package Power Delivery Architecture for High Performance Computing Systems With a 1 kW IVR Operated in CCM-DCM Boundary Mode with High Efficiency
Ramin Rahimzadeh Khorasani — Pennsylvania State University
Rohit Sharma — Indian Institute of Technology Ropar
Madhavan Swaminathan — Pennsylvania State University

7. Study for Realization of the Next Generation High Density RDL Packaging for 2.5D Large Silicon Interposer
Masaki Mizutani — Canon, Inc.
Douglas Shelton — Canon USA, Inc.
Yusuke Tokuyama — Canon, Inc.
Noriyuki Shiozawa — Canon, Inc.
Mizuma Murakami — Canon, Inc.
Hiromi Suda — Canon, Inc.
Ken-Ichiro Shinoda — Canon, Inc.
Ken-Ichiro Mori — Canon, Inc.