Technical Program

Session 8: Chiplet Integration and Fan-Out Interconnections
Committee: Interconnections

Session Co-Chairs:

Katsuyuki Sakuma
IBM Corporation
T +1-914-945-2080
Tom Gregorich
Zeiss Semiconductor Manufacturing Technology
T +1 208-297-0138


1. A Novel Wafer-level Packaging Technology : A Key Enabler for New-era High-performance Computing
Min Jung Kim - Samsung Electronics Company, Ltd.
Seok Hyun Lee - Samsung Electronics Company, Ltd.
Kyoung Lim Suk - Samsung Electronics Company, Ltd.
Jae Gwon Jang - Samsung Electronics Company, Ltd.
Gwang-Jae Jeon - Samsung Electronics Company, Ltd.
Won Kyoung Choi - Samsung Electronics Company, Ltd.

2. The Dynamic Behavior of Electromigration in a Novel Cu Tall Pillar/Cu Via Interconnect for Fan-Out Packaging
Chien-Lung Liang - National Cheng Kung University
Min-Yan Tsai - Advanced Semiconductor Engineering, Inc.
Yung-Sheng Lin - Advanced Semiconductor Engineering, Inc.
I-Ting Lin - Advanced Semiconductor Engineering, Inc.
Sheng-Wen Yang - Advanced Semiconductor Engineering, Inc.
Min-Lung Huang - Advanced Semiconductor Engineering, Inc.
Jen-Kuang Fang - Advanced Semiconductor Engineering, Inc.
Kwang-Lung Lin - National Cheng Kung University

3. Electrical Design Challenges in High Bandwidth Memory and Advanced Interface Bus Interfaces on HD-FOWLP Technology
Mihai Rotaru - Institute of Microelectronics, A*STAR
Li Kangrong - Institute of Microelectronics, A*STAR

4. Advances in Photosensitive Polymer Based Damascene RDL Processes: Toward Submicrometer Pitches with More Metal Layers
Emmanuel Chery - IMEC
John Slabbekoorn - IMEC
Nelson Pinho - IMEC
Andy Miller - IMEC
Eric Beyne - IMEC

5. Ultra-High Strength Cu-Cu Bonding under Low Thermal Budget for Chiplet Heterogeneous Applications
Zhong-Jie Hong - National Chiao Tung University
Demin Liu - National Chiao Tung University
Han-Wen Hu - National Chiao Tung University
Ming-Chang Lin - Innolux Corporation
Tsau-Hua Hsieh - Innolux Corporation
Kuan-Neng Chen - National Chiao Tung University

6. Effectiveness of Inorganic Dielectric Layer on Submicron-scale Cu Traces against Thermal Oxidative Stress
Hiroshi Kudo - Dai Nippon Printing Co., Ltd.
Takamasa Takano - Dai Nippon Printing Co., Ltd.
Kouji Sakamoto - Dai Nippon Printing Co., Ltd.
Daisuke Kitayama - Dai Nippon Printing Co., Ltd.
Haruo Iida - Dai Nippon Printing Co., Ltd.
Masaya Tanaka - Dai Nippon Printing Co., Ltd.
Takahiro Tai - Dai Nippon Printing Co., Ltd.
Yumi Okazaki - Dai Nippon Printing Co., Ltd.
Jyunya Suzuki - Dai Nippon Printing Co., Ltd.
Shingi Maekawa - Dai Nippon Printing Co., Ltd.

7. Reliability of Chip-Last Fan-Out Panel-Level Packaging for Heterogeneous Integration
John Lau - Unimicron Technology
CT Ko - Unimicron Technology
Tony Peng - Unimicron Technology
Henry Yang - Unimicron Technology
Tim Xia - Unimicron Technology
Bruce Lin - Unimicron Technology
Jean-Jou Chen - Unimicron Technology
Po-Chun Huang - Unimicron Technology
TJ Tseng - Unimicron Technology
Eagle Lin - Unimicron Technology
Leo Chang - Unimicron Technology